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Chip production and packaging process
Source:wynaik Time:2015-12-09
Chip is the most critical component of electronic products, then the chip production and packaging process exactly how it is like, this article summarizes some of the video and the network's Digest, I hope to understand the chip production and packaging knowledge of some help!

Because the chip must be isolated from the outside world to prevent the impurities in the air from the chip circuit corrosion caused by electrical performance degradation. On the other hand, the chip is also more convenient to install and transport. As the packaging technology is good or bad also directly affects the performance of the chip itself and the connection to the PCB (printed circuit board) design and manufacturing, it is essential to.

An important indicator to measure the advanced technology of a chip package is the ratio of the area of the chip to the area of the package, the more close to 1. The main considerations in the package:

1, the chip area and the ratio of the size of the package is to improve the packaging efficiency, as close as possible to 1:1;

2, pin to minimize the delay, the distance between the pin as far as possible, to ensure that the mutual interference, improve performance;

3, based on the requirements of heat dissipation, the thinner the better.

The package is divided into DIP and SMD dual in-line package two. From the aspect of structure, the TO transistor package through the early (TO-89, TO92) package to the development of the dual in line package, followed by the PHILIP company developed the SOP small outline package, then gradually derived SOJ (J type pin small outline package), TSOP (thin small outline package, VSOP (very small) (SSOP) package, SOP, TSSOP (narrow) narrow thin type SOP) and SOT (small outline transistor), SOIC (SOIC) etc.. From the aspects of materials, including metal, ceramic, plastic, plastic, at present, many high strength working conditions of the circuit such as military and aerospace grade still have a lot of metal packaging.

The package has been developed as follows:

Structure: TO>DIP>PLCC>QFP>BGA >CSP;

Materials: metals, ceramics, plastics > plastic ceramic >;

Pin shape: long wire line - > short lead or leadless mount - > spherical convex point;

Assembly method: through hole insert and assembly, surface mount

Specific package form

1, SOP/SOIC packaging

SOP is the abbreviation of Outline Package Small in English, that is, small outline package. SOP packaging technology from 1968 to 1969, Philip successfully developed, gradually derived from the SOJ (J type pin small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (SOP), TSSOP (SOP) and SOT (small outline transistor), SOIC (small outline integrated circuit), etc..

2, DIP packaging

DIP is the abbreviation of Package In-line Double English, namely dual in-line package. Plug in one of the packaging, the lead from the package on both sides of the lead, the packaging material has two kinds of plastic and ceramic. DIP is the most popular plug-in type package, including the application of standard logic IC, memory LSI, microcomputer circuit etc..

3, PLCC packaging

PLCC is English Plastic Leaded Chip Carrier abbreviation, namely J plastic leaded chip package. PLCC package, the shape of a square, 32 foot package, all around the foot, the shape of the DIP package is much smaller than the. PLCC package is suitable for the installation of SMT on the PCB, with the advantages of small size and high reliability.

4, TQFP packaging

TQFP is English thin quad flat package abbreviation, namely thin plastic four corners flat package. Quad flat package (TQFP) technology can effectively use the space, so as to reduce the size of the printed circuit board space requirements. Due to the reduction of the height and volume, the packaging process is very suitable for the application of high space requirements, such as PCMCIA card and network device. Almost all CPLD/FPGA ALTERA have TQFP package.

5, PQFP packaging

PQFP is English Plastic Quad Flat Package abbreviation, namely four angle plastic flat package. The chip pin PQFP package is very small, the pin is very thin, the general large-scale or ultra large scale integrated circuit uses this kind of package form, its pin number is generally above 100.

6, TSOP packaging

TSOP is English Thin Small Outline Package abbreviation, namely thin small outline package. One of the typical features of the TSOP memory packaging technology is the use of SMT Technology (surface mount technology) on the PCB (printed circuit board) on the periphery of the chip. TSOP package size, the parasitic parameters (current large margin, causing the output voltage disturbance) to reduce, for high frequency applications, the operation is more convenient, reliability is relatively high.

7, BGA packaging

BGA is an acronym for Grid Array Package Ball, which is a ball grid array package. 1990s with the progress of technology, chip integration is increasing, the number of I/O pins is increasing rapidly, power consumption is also increased, the requirements of IC packaging is also more stringent. In order to meet the needs of development, the BGA package has been applied to production.

The memory of the BGA technique can be used to increase the memory capacity of two to three times, and the BGA has a smaller size, better cooling performance and electrical properties compared with TSOP. The BGA packaging technology has greatly improved the storage capacity per square inch, the memory products of BGA packaging technology in the same capacity, the volume of only 1/3 of the TSOP package, in addition, compared with the traditional TSOP packaging, BGA packaging has a more rapid and effective way of cooling.

I/O package of the BGA terminal in a round or columnar solder joints in the package in the form of BGA technology. Technology has the advantage of increasing the number of I/O pins. However, the pin spacing does not decrease but increase the rate of assembly. Although its power consumption increases, the BGA can be used to improve its thermal performance.
When it comes to the BGA package is not to mention the Kingmax company's patented TinyBGA technology, the full name of the TinyBGA Tiny Ball Grid Array (small ball grid array package), belong to a branch of the BGA packaging technology. Kingmax company in August 1998 to develop a successful, the chip area and the size of the package is not less than 1:1.14, can make the memory in the case of the same memory capacity increased by 3 ~ 2 times, compared with the TSOP packaging products, it has a smaller size, better heat dissipation performance and electrical performance.

Memory products using TinyBGA packaging technology in the same capacity, the volume is only 1/3 TSOP. TSOP memory is the memory of the pin is drawn around the chip, and the TinyBGA is the central direction of the chip. In this way, the signal transmission distance is shortened, and the signal transmission line is only 1/4, so the attenuation of the signal is also reduced. This not only greatly improve the chip's anti jamming, anti noise performance, but also improve the electric performance. Using TinyBGA chip resistance up to 300MHz FSB, the traditional

TSOP packaging technology can only be the highest anti 150MHz fsb.

The memory of the TinyBGA package is thinner (the package height is less than 0.8mm), and the effective cooling path from the metal substrate to the heat dissipating body is only 0.36mm. Therefore, TinyBGA memory has a higher heat conduction efficiency, very suitable for long time running system, excellent stability.





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